Verilog

languages / Verilog
31,572Developers

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1gravatar for alexforencichalexforencich93,239
2gravatar for T-head-SemiT-head-Semi52,616
3gravatar for ultraembeddedultraembedded332,319
4gravatar for ZipCPUZipCPU342,300
5gravatar for SI-RISCVSI-RISCV12,102
6gravatar for freecoresfreecores2951,538
7gravatar for nvdlanvdla21,362
8gravatar for FPGAwarsFPGAwars71,073
9gravatar for olofkolofk141,067
10gravatar for analogdevicesincanalogdevicesinc11,022
47,004Repos

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RankRepoStarsDeveloper
SI-RISCV/e200_opensource on Github1e200_opensource2,102SI-RISCV
T-head-Semi/wujian100_open on Github2wujian100_open1,602T-head-Semi
nvdla/hw on Github3hw1,349nvdla
alexforencich/verilog-ethernet on Github4verilog-ethernet1,243alexforencich
analogdevicesinc/hdl on Github5hdl1,022analogdevicesinc
mntmn/amiga2000-gfxcard on Github6amiga2000-gfxcard958mntmn
corundum/corundum on Github7corundum944corundum
ZipCPU/zipcpu on Github8zipcpu901ZipCPU
aolofsson/oh on Github9oh849aolofsson
olofk/serv on Github10serv827olofk
467Topics

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TopicReposStars
fpga11111,072
risc-v244,685
cpu153,312
ultra-low-power12,102
processor-design11,387
hdl71,378
icestorm31,210
asic31,054
jesd204b11,020
analog-devices11,020