SystemVerilog

languages / SystemVerilog
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1gravatar for lowRISClowRISC103,659
2gravatar for openhwgroupopenhwgroup113,401
3gravatar for pulp-platformpulp-platform1233,227
4gravatar for chipsalliancechipsalliance81,423
5gravatar for itsFrankitsFrank31,020
6gravatar for hdl-utilhdl-util101,000
7gravatar for westerndigitalcorporationwesterndigitalcorporation1828
8gravatar for rsd-develrsd-devel1815
9gravatar for trivialmipstrivialmips2636
10gravatar for VerificationExcellenceVerificationExcellence3625
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lowRISC/opentitan on Github1opentitan1,958lowRISC
openhwgroup/cva6 on Github2cva61,819openhwgroup
lowRISC/ibex on Github3ibex1,075lowRISC
itsFrank/MinecraftHDL on Github4MinecraftHDL1,020itsFrank
hdl-util/hdmi on Github5hdmi895hdl-util
westerndigitalcorporation/swerv_eh1 on Github6swerv_eh1828westerndigitalcorporation
rsd-devel/rsd on Github7rsd815rsd-devel
pulp-platform/axi on Github8axi784pulp-platform
openhwgroup/cv32e40p on Github9cv32e40p773openhwgroup
chipsalliance/Cores-VeeR-EH1 on Github10Cores-VeeR-EH1723chipsalliance
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