SystemVerilog
languages / SystemVerilog8,697Developers
Top ranked
| Rank | Developer | Repos | Stars | |
|---|---|---|---|---|
| 1 |  | lowRISC | 10 | 3,659 |
| 2 |  | openhwgroup | 11 | 3,401 |
| 3 |  | pulp-platform | 123 | 3,227 |
| 4 |  | chipsalliance | 8 | 1,423 |
| 5 |  | itsFrank | 3 | 1,020 |
| 6 |  | hdl-util | 10 | 1,000 |
| 7 |  | westerndigitalcorporation | 1 | 828 |
| 8 |  | rsd-devel | 1 | 815 |
| 9 |  | trivialmips | 2 | 636 |
| 10 |  | VerificationExcellence | 3 | 625 |
12,922Repos
Top ranked
| Rank | Repo | Stars | Developer | |
|---|---|---|---|---|
 | 1 | opentitan | 1,958 | lowRISC |
| 2 | cva6 | 1,819 | openhwgroup |
| 3 | ibex | 1,075 | lowRISC |
| 4 | MinecraftHDL | 1,020 | itsFrank |
| 5 | hdmi | 895 | hdl-util |
| 6 | swerv_eh1 | 828 | westerndigitalcorporation |
| 7 | rsd | 815 | rsd-devel |
| 8 | axi | 784 | pulp-platform |
| 9 | cv32e40p | 773 | openhwgroup |
| 10 | Cores-VeeR-EH1 | 723 | chipsalliance |