SystemVerilog
languages / SystemVerilog10,921Developers
Top ranked
Rank | Developer | Repos | Stars | |
---|---|---|---|---|
1 | lowRISC | 11 | 4,247 | |
2 | pulp-platform | 129 | 3,844 | |
3 | openhwgroup | 12 | 1,869 | |
4 | chipsalliance | 8 | 1,584 | |
5 | hdl-util | 10 | 1,119 | |
6 | itsfrank | 3 | 1,060 | |
7 | rsd-devel | 1 | 903 | |
8 | westerndigitalcorporation | 1 | 846 | |
9 | syntacore | 1 | 768 | |
10 | VerificationExcellence | 3 | 689 |
16,405Repos
Top ranked
Rank | Repo | Stars | Developer | |
---|---|---|---|---|
1 | opentitan | 2,342 | lowRISC | |
2 | ibex | 1,237 | lowRISC | |
3 | MinecraftHDL | 1,060 | itsfrank | |
4 | hdmi | 997 | hdl-util | |
5 | axi | 918 | pulp-platform | |
6 | rsd | 903 | rsd-devel | |
7 | cv32e40p | 867 | openhwgroup | |
8 | swerv_eh1 | 846 | westerndigitalcorporation | |
9 | Cores-VeeR-EH1 | 772 | chipsalliance | |
10 | scr1 | 768 | syntacore |